搜索资源列表
ADCODE
- 用FPGA控制双ADC0809读写，用于双AD热备控制，用verilog实现-FPGA control with dual ADC0809 read and write, hot standby control for double AD, with verilog implementation
adc
- 设计ADC控制器，Verilog代码.利用有限状态机设计方法在FPGA上设计ADC0809的接口控制器，采样结果送到数码管显示出来。-ADC controller design, Verilog code using finite state machine design in the FPGA design ADC0809 interface controller, the sampling results to the digital display.
adc0809ctrl
- 用fpga芯片使用vhdl语言对AD转换芯片ADC0809进行控制-Using the fpga chip use language of VHDL AD transform chip ADC0809 control
adcint
- 基于FPGA，实现控制ADC0809对模拟信号的采样输出-Based on FPGA, to control the ADC0809 to the analog signal sampling output
ADc
- 与单片机相比，用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809，根据ADC0809的工作时序使用CPLD产生该控制信号，CPLD启动AD转换后，得到的数据送至单片机并在PC机及数码管上显示AD转换结果。-Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of
AD
- 基于FPGA的对ADC0809控制的一些实例，对初学者有一定的帮助-Based on FPGA for control of the ADC0809 a simple procedure, to help beginners understanding
8.4
- 功能：基于VHDL语言，实现对ADC0809简单控制 --说明：ADC0809没有内部时钟，需外接10KHz~1290Hz的时钟信号，这里由FPGA的系 --统时钟（50MHz）经256分频得到clk1（195KHz）作为ADC0809转换工作时钟。 -: Based on the VHDL language, ADC0809 simple control- Descr iption: ADC0809 no internal clock, an external clock sign
AD_OK_auto
- ADC0809 FPGA verilog
volt
- 基于FPGA的数字电压表的设计。用FPGA完成ADC0809的控制，测量电压值，并用数码管显示。-FPGA-based design of digital voltmeter. ADC0809 with FPGA complete control, measure voltage, and digital tube display.